Flash Controller

Key Features


  • Up to 8 Slave SRAMs Ports
  • Independent port configuration
  • Independent transaction queuing
  • Configuration register read and write
  • Burst Mode support
  • Page Mode support
  • Asynchronous Mode support
  • Full synthesizable
Overview
Architecture
Applications
Resources
 The FLASH controller was designed as an SoC interface for industry standard FLASH devices. This controller simplifies the transmission and reception of data to and from external FLASH RAMS connected to the SoC via the dedicated FLASH address and data bus lines. In addition it is also capable of controlling, and configuring all features of standard flash devices, such as security and erase features which are essential for data protection and integrity. Setup and configuration for the device is very simple and requires just few steps. The hardware architecture was conceived with the application developer in mind and has autonomous features at the hardware level which simplifies software controls.