SRAM Controller

Key Features


  • Up to 8 Slave FLASH Ports
  • Independent port configuration
  • Independent transaction queuing
  • Configuration registers R/W
  • Configurable erase operations
  • Security configuration
  • Burst Mode support
  • Page Mode support
  • Asynchronous Mode support
  • Full synthesizable
Overview
Architecture
Applications
Resources
The SRAM controller was designed as a software programmable SoC interface for Micron SRAM devices, with applications to industry standard SRAM devices as well. This controller simplifies the transmission and reception of data to and from external SRAMs connected to the SoC via the dedicated SRAM address and data bus lines. The controller is capable of configuring and maintaining up to 8 slave devices independently. Setup and configuration of each slave device is made simple to the application developer, as a result of the hardware architecture of the controller.