Chameleon-QSI

Key Features


  • 32 Advanced RISC
  • Custom Instruction
  • Microprogrammable
  • 5 Stage Pipeline
  • Single Cycle ALU
  • Advanced High Radix Multiply
  • Small Footprint
  • Look ahead Branch Resolution
Overview
Architecture
Applications
Resources
Tools

QSI is a 32 bit RISC microprocessor (uPC) optimized for embedded systems, such as FPGAs, CPLD and ASIC technologies. While there is a standard instruction set architecture (ISA), the instruction set is application specific and configured custom applications. The processor is based on a single cycle execution, five stage pipeline architecture. The execution unit is ALU based, with advanced multiply and division algorithms. The uPC was designed to target embedded applications where the programmable control of peripheral devices needs to be optimal and efficient. The processor's architecture allows programmers to develop high level embedded control for user interface applications.